ARCHITECTURE

Page 1 of 7 ASSIGNEMNT BRIEF HTU Course No: 30201480 HTU Course Name: Advanced Computer Architecture BTEC UNIT No: N/A BTEC UNIT Name: N/A 1 Page 2 of 7 Assignment Brief Student Name/ID Number/Section HTU Course Number and Title BTEC Unit Number and Title Academic Year Assignment Author Course Tutor Assignment Title Assignment Ref No. Issue Date Formative Assessment dates Submission Date IV Name & Date 30201480 – Advanced Computer Architecture N/A 2023/2024 (Spring Semester) Dr. Huthaifa Al-Omari, Dr. Abdullah Alamaren Dr. Huthaifa Al-Omari, Dr. Abdullah Alamaren HTU – Basic Computer 1 Part 1: 09/05/2024 Part 2: 12/06/2024 20/03/2024 -to30/05/2024 Part 1: 12/06/2024 Part 2: 12/06/2024 Eng. Mostafa Smadi 25/04/2024 Submission Format This assignment consists of two parts where the submission of the assignment should be: For part 1: An individual word-processed report that consists of: ▪ System Design ▪ Assembly language Coding Project using Mano’s Simulator ▪ Problem Solving ▪ Research Task Your report should be: o written in a concise, formal business style using single spacing and font size 12 with use of headings, paragraphs and subsections as appropriate. o supported with research and referenced using the Harvard referencing system. For part 2: In-class closed book, closed notes examination. Your answer should be clear and coherent. Providing final answers without showing detailed steps is not accepted. If the tasks are completed over multiple pages, ensure that your name and student number are present on each sheet of paper. Unit Learning Outcomes LO1 Investigate the functions of computer system components. LO2 Examine the design and organization of basic computer. LO3 Discuss how data and programs can be represented within computer systems. LO4 Investigate advanced computer architectures and performance. 2 Page 3 of 7 Assignment Brief and Guidance You are assigned the role of a computer architecture specialist within a pioneering computer design company, known for its proficiency in developing state-of-the-art Basic Computers (BC) customized for specific purposes. The company has embarked on developing a specialized BC named “HTU-BC,” aimed at executing specific tasks as dictated by clients. Your job as the project leader is to make sure the “HTU-BC” works well and does what it’s supposed to do. You’ll be checking how well it works and making sure everything goes smoothly. With your skills in computer design and testing, you’ll be showing everyone how good you are at this job. As you start this journey, your leadership and tech skills will help guide the “HTU-BC” toward its goals, shaping the future of computer innovation. The following problems aim to assess your proficiency in designing, coding, and validating the functionality and performance of the Basic Computer. Part1: 1) Consider the following digital logic diagram: a. Find the Boolean expression of the output z in terms of the inputs A, B and C. b. Construct the Truth table for the output z. c. Simplify the function z to a minimum number of literals using Boolean Algebra. d. Draw the logic diagram for the simplified expression. e. Construct the Truth table for the simplified expression. 2) Simplify the following Boolean functions using K-map and draw the logic diagrams for the obtained simplified expressions. a. f(W,X,Y,Z) = m(0,1,3,4,5,7,8,11,12 ,15) b. f(W,X,Y,Z) = m(1,2,12,15) 3 Page 4 of 7 3) A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code, a register code part to specify one of 100 registers, and an address part. a. How many bits are there in the operation code, the register code part, and the address part? b. Draw the instruction word format and indicate the number of bits in each part. c. Indicate the size of each register by filling the following table. Register Size PC AC AR TR DR IR 4) An 8-bit register contains the binary value 10010100. a. What is the register value after arithmetic shift right? b. Starting from the initial value 10010100, determine the register value after an arithmetic shift left. Indicate whether an overflow occurs or not and verify your answers. 5) Design a common bus system for six registers where each register has eight bits. 4 Page 5 of 7 6) Convert the octal number 675324 to binary and hexadecimal. 7) Perform the following arithmetic operations with binary numbers in signed-2’s complement representation. Use eight bits to accommodate each number together with its sign. Indicate whether an overflow occurs or not. Verify your answers. a. (+80) + (+101) b. (-80) + (-101) 8) An instruction is stored at location 500 with its address field at location 501. The address field has the value 700. A processor register R1 contains the number 100. Evaluate the effective address if the addressing mode of the instruction is: Addressing Mode Effective Address Direct Immediate Relative Register indirect Index with R1 as the index register 9) Develop a BC assembly program that receives two 8-bit numbers from the user and performs multiplication on them and stores the result in the memory. For simplicity neglect the sign bit and assume positive numbers. Explain in detail how your program works and provide a flowchart that shows the step-by-step procedure for programming the multiply operation. Use the BC simulator to execute and verify your program. 5 Page 6 of 7 10) Consider the following arithmetic expression: 𝐴 ∗ [𝐵 + 𝐶 ∗ (𝐷 + 𝐸)] 𝐹 ∗ (𝐺 + 𝐻) a. Convert the above expression from infix to reverse Polish notation. b. Show the stack operations for evaluating the expression. 11) Convert the following arithmetic expression from Polish notation to infix notation: a. A B C D E + * – / b. A B C D E F G + * + * + * 12) A non-pipeline system takes 70 ns to process a task. The same task can be processed in a 7-segment pipeline with a clock cycle of 7 ns. For number of tasks n = 100, find the following: a. Time required by the non-pipeline system to complete the tasks. b. Time required by the pipeline system to complete the tasks. c. Speedup ratio of the pipeline for the tasks. 13) Conduct research about the Reduced Instruction Set Architecture and the Complex Instruction Set Architecture, explaining their characteristics, advantages and disadvantages. Your research should be supported with references using the Harvard referencing system. Part2: An in-class exam on Wednesday 12/06/2024. 6 Page 7 of 7 Learning Outcomes and Assessment Criteria Pass Merit Distinction LO1 Investigate the functions of computer system components P1 Identify the main subsystems of a computer and explain how they are organized and connected. P2 Carry out Boolean logic operations to simplify algebraic expressions in Boolean functions. M1 Examine how K-Map is used to optimize the design of digital logic systems. D1 Analyze digital components used in the organization of digital computers LO2 Examine the design and organization of basic computer P3 Examine the structure of instruction set for a basic digital computer. P4 Identify the sequence of events in carrying out the Instruction cycle. M2 Examine the structure of the common bus system D2 Create a design of control logic circuits for Basic Computer components. LO3 Discuss how data and programs can be represented within computer systems. P5 Investigate how different types of data can be converted and stored in computer systems. M3 Create a low-level program which includes decision making, branching, subroutine, and I/O operations. D3 Examine the content of memory and registers of the Basic Computer while executing low-level programs P6 Examine different types of addressing modes LO4 Investigate advanced computer architectures and performance M4 Illustrate how pipelining improves the performance of a computer system. P7 Use stack organization to evaluate arithmetic expressions. D4 Examine the general register organization. M5 Compare and contrast the RISC and the CISC architectures and show their advantages and disadvantages. 7